1. One simple means of device handshaking involves polling:
A. The host repeatedly checks the busy bit on the device until it becomes clear.
B. The host writes a byte of data into the data-out register, and sets the write bit in the command register
C. The host sets the command ready bit in the command register to notify the device of the pending command.
D. Answer: All of the above
2. Polling can be very fast and efficient
A. if both the device and the controller are fast
B. if there is significant data to transfer
C. if frequent checks need to be made for data
D. Answer: Option A and B
3. Modern interrupt hardware also supports interrupt priority levels,by
A. allowing systems to mask off only lower-priority interrupts while servicing a
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a terminal concentrator can multiplex with _________of terminals on a _______port(s) on a large computer.
A. Hundred ,three
B. Thousand,Single
C. Answer: Hundreds, single
D. Million , thousand
6. In serial interface only _____ line(s) is used to transmit data, therefore, only one bit is transferred at a time. Serial interface is used for serial printers and terminals.
A. Three
B. Answer: One
C. Many
D. Two seventy three
7. Most of the I/O processors have its own memory while a DMA module does not have its own memory except for register or a simple buffer area.
A. Answer: True
B. False
8. The advantages of interrupt driven I/O over programmed I/O is that in interrupt driven I/O the interrupt mechanisms free I/O devices quickly.
A. Answer: True
B. False
9. Data buffering is helpful for smoothing out the speed difference between CPU and input/ output devices
A. True
B. Answer :False
10. Input/output Module is needed only for slower I/O devices.
A. Answer :True
B. False
11. The devices are normally connected directly to system bus.
A. True
B. Answer : False
12. Data chaining indicates that the next CCW contains the address of _________ data for the same command, allowing, portions of one record to be written from or read to multiple data areas in
The sequential large I/O and random input and output reads and write are needed for an application. It offers a good I/O response for random as it reads and poor for the small random writes. For random writes, its good and are slow for parity overhead
This means that you can store a lot more data and process it at a lower cost with a lower latency.(Richards, 2016)
Most I/O devices interface to the CPU in a fashion quite similar to memory. Indeed, many devices appear to the CPU as though they were memory devices. To output data to the outside world the CPU simply stores data into a "memory" location and the data magically appears on some connectors external to the computer. Similarly, to input data from some external device, the CPU simply transfers data from a "memory" location into the CPU; this "memory" location holds the value found on the pins of some external connector.
Data element resident in the terminal shall be under control of one of the following parties:
These are two factors hastening the use of in-memory technology, and DataStax introduced the latest database management system (DBMS) to add in-memory processing capabilities.
The research paper being summarized only explains the “Reconfigurable Hardware execution engine (RHW-EXE)” (Figure 3). The other two are “Main Memory Execution Engine (MM-EXE)” and the “Disc Resident Execution Engine (DR-EXE)”.
Memory, RAM and storage are getting cheaper. However, what is not happening is that the performance of the access time and decrease resp. increasing at an exponential pace. Considering the technology of magnetic disk specifically we see that disk density has been improving by about 50% per year, almost quadrupling in three years. Access time has only improved by one-third in 10 years.
Case in point, dynamic memory is ordinarily utilized for essential information stockpiling because of its quick get to speed. However alert
data can be sent to the chip per clock cycle. MIPS or millions of instructions
Ram has changed a lot since the first computers and there are tons of types of RAM. For example there is DRAM (Dynamic RAM Dynamic is basically another way of saying volatile) and there’s also SRAM (Static RAM.) Modern PC’s use DDR3 or most do anyway and DDR means double data rate the 3 means you basically take the normal rate of DRAM and multiple it by 2 for the double data rate and then by 3 for the 3 in DDR3. Now that we have talked a little about RAM itself we can get back to the original topic.
You should understand whether you are a controller or a processor: if you are falling in the category of above then you have to hold on your data accordingly and in some cases, you can be both so one has to comply with the regulations of the falling category.
Today users have plenty of high quality and high resolution data present though various technologies and more data keeps on generating in various domains and fields. So the passage of huge data sets between External memory and internal memory of computer is becoming commonplace. However there is a vast difference between data access speeds on internal memory and external memory. Internal memory is very fast while external memory is about 105 to 106 times slower in performing
Today’s computers have different ways to store data. Some examples of these ways are devices as the hard disk (aka magnetic disk), floppy disk, RAM, CD ROM, tape, and the flash (aka jump drive, USB memory stick, and thumb drive). Storage devices come in two different sources; primary or secondary. Each of these devices causes the computer to process data at different speeds. This paper will show how each of these devices store data and how they affect the speed of the computer.
Managing input/output devices – This allows the user to plug in devices such as a keyboard and a mouse to communicate with the computer
Instructions executed by a processor, in general, are of the types: load, store, move, add, compare or jump; a collection of which forms the Instruction Set Architecture (ISA) of any microprocessor. A jump is a control flow instruction, which can be broadly divided into two categories: (a) Conditional Branch (CB) and (b) Unconditional Branch (UB). Based on a run-time condition, CBs can be further classified as Forward CBs (FCBs), also called a forward jump, where the Program Counter (PC) is changed so as to point to an address ahead of the current position in the instruction stream; and Backward CBs (BCBs), a backward jump, where the PC is changed to point backward in the instruction stream. This is pictorially shown below in Fig.1 and Fig.2, respectively.