1 1 Load parallel data 6.7 Draw the logic diagram of a four-bit register with four D flip- flops and four 4×1 multiplexers with mode selection inputs s1 and so. The register operates according to the following function table. (HDL ―see Problem 6.35(e), (f)) s1 s0 Register Operation 0 0 No change 10 Complement the four outputs 01 Clear register to 0 (synchronous with the clock)
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- Scenario: In a biased N-bit binary number system with bias B, positive and negative numbers are represented as their value plus the bias B. For example, for 5-bit numbers with a bias of 15, the number 0 is represented as 01111, 1 as 10000, and so forth. Biased number systems are sometimes used in floating point mathematics. Consider a biased 8-bit binary number system with a bias of 12710 Question: What is the representation and value of the most positive number?Consider two binary numbers where the first is made of three bits whichcan be represented by X, Y, and Z, while the second is two bits and isrepresented by A and B. Design a logic circuit that multiplies X Y Z timesA B, using two half adders, one full adder in addition to AND gates.Question 5 a) Briefly explain the Nyquist theorem in the context of digital sampling. b) Using logic gates, design an active low chip select for the memory a 256 K memory device starting at address 38000016 in a 16 Megabyte memory space. c) Convert each of the following 8-bit signed magnitude binary numbers to decimal. i) 10110101(base 2) ii) 01000101(base 2) iii) 11101010(base 2) iv) 01011110(base 2)
- We want to design a circuit to detect prime numbers.The input of the circuit is a 4-bit binary number and the output is a single bit and should show one when the number is prime and zero otherwise.B. Implement the circuit using a 4× 1 multiplexer and combinational logic gates.C. Implement the circuit using only one decoder and one OR gate. What is the size of the decoder you use?Draw the block diagram for a common bus system for 16 registers of 32 bits each. The bus is constructed with multiplexers.Question 6a) One extremely powerful aspect of CMOS is the ability to create single gate circuits that can implement functions consisting of several basic Boolean logic operations. This makes digital CMOS design quite different from classical logic design techniques, since now the logic expressions and the corresponding circuits become very closely related.With this back ground how would you solve Y = A +{ B × ( C +D ) }using what you have learned
- . Design a combinational circuit to convert a 4-bit binary number to gray code using(a) standard logic gates,(b) decoder,(c) 8-to-1 multiplexer,(d) 4-to-1 multiplexer.for a cathode 7 segment display create a truth table and kmap for a function that is BCD to 7 segment decoder. then draw the logic circuit using and, or,not gates. The circuit should only display decimal digit for binary input 0 to 9 rest should be blankIn an adder circuit in which two numbers of two bits are added together, what will be the output signal values at the last hand when the inputs are given as follows?
- Which of the following is an important feature of the sum-of-products form of expressions? • The delay times are greatly reduced over other forms. • The maximum number of gates that any signal must pass through is reduced by a factor of two. • No signal must pass through more than 2 gates (not including inverters). • All logic circuits are reduced to nothing more than simple AND and OR gates.Is it possible to convert 16-bit binary data to 8-bit binary data such as: 1111111011111110 -> this 16 bit to 8 bit? If possible then do it and mention the converted binary number.Design an even/odd parity generator for 4-bit data than implement cet. diagram