9:38.... 89 Assignment 3_ECE 161.pdf Assignment 3 (CLO 3) ECE-161 Digital Logic Design Deadline: Friday, May 10, 3:00 pm Q.1 Design a binary multiplier to multiply two 4-bit numbers by utilizing AND gates and binary adders in the design. Q. 2 You are required to design a combinational logic circuit that takes two 4-bit numbers A and B and a 1-bit input C. The circuit should function as an adder or a subtractor of the inputs A and B, such that based on the input C it toggles between addition and subtraction. Assume that A>B. Q.3 Design a combinational circuit based on the given three Boolean functions. F₁(A,B,C)=(2, 4, 7) F₂(A,B,C)=(0,3) F3(A,B,C)=(0, 2, 3, 4, 7) Implement the circuit using a decoder constructed with NAND gates and "NAND or AND" gates connected to the decoder outputs. Q.4 Construct a full adder utilizing two 4x1 multiplexers. Q.5 Construct a circuit to implement the following truth table shown below. SR 0 1 QQ' 1 0 1 0 0 1 1 1 Q Q' Q 용 Q.6 Design a BCD-to-decimal decoder using the unused combinations of the BCD code as don't-care conditions. = A
9:38.... 89 Assignment 3_ECE 161.pdf Assignment 3 (CLO 3) ECE-161 Digital Logic Design Deadline: Friday, May 10, 3:00 pm Q.1 Design a binary multiplier to multiply two 4-bit numbers by utilizing AND gates and binary adders in the design. Q. 2 You are required to design a combinational logic circuit that takes two 4-bit numbers A and B and a 1-bit input C. The circuit should function as an adder or a subtractor of the inputs A and B, such that based on the input C it toggles between addition and subtraction. Assume that A>B. Q.3 Design a combinational circuit based on the given three Boolean functions. F₁(A,B,C)=(2, 4, 7) F₂(A,B,C)=(0,3) F3(A,B,C)=(0, 2, 3, 4, 7) Implement the circuit using a decoder constructed with NAND gates and "NAND or AND" gates connected to the decoder outputs. Q.4 Construct a full adder utilizing two 4x1 multiplexers. Q.5 Construct a circuit to implement the following truth table shown below. SR 0 1 QQ' 1 0 1 0 0 1 1 1 Q Q' Q 용 Q.6 Design a BCD-to-decimal decoder using the unused combinations of the BCD code as don't-care conditions. = A
Chapter22: Sequence Control
Section: Chapter Questions
Problem 6SQ: Draw a symbol for a solid-state logic element AND.
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