Consider 04 lines cache with 2-way set associativity, 08 bytes block size and FIFO strategy for block eplacement. For the following memory access sequence, identify if we will have Cache Hit or Cache Miss for each memory access. Time Memory Address Accessed OHN345678 0 1 2 3 4 5 6 7 8 9 18 22 42 30 50 20 60 54 44 62 Block# Cache Hit/Miss

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