Consider a byte-addressable computer with 32-bit addresses, a cache capable of storing a total of 64K bytes of data, and cache blocks of size 128 bytes. If the computer uses direct mapping, the format of the memory address is as follows: bits for the tag field, bits for the cache block number, and bits for the block offset.

Consider a byte-addressable computer with 32-bit addresses, a cache capable of storing a total of 64K bytes of data, and cache blocks of size 128 bytes. If the computer uses direct mapping, the format of the memory address is as follows: bits for the tag field, bits for the cache block number, and bits for the block offset.

Systems Architecture

7th Edition

ISBN:9781305080195

Author:Stephen D. Burd

Publisher:Stephen D. Burd

Chapter6: System Integration And Performance

Section: Chapter Questions

Problem 22VE

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