Q1: (A) Prove the following Boolean equation using the theorems of Boolean algebra. A+B (ABA) B (B) Find the state table, state equations, and output equation for the following sequential logic circuit. X J B K A K B CLK- Q2: (A) Design a ripple counter to count the sequence: 0, 1, 2, 3 and repeat, using J-K flip-flops of asynchronous CLEAR and PRESET inputs to initialize the counter to state 0. (B) Implement the following Boolean equations using 4X1 Multiplexers and one NOT gate only. Y = A + BC Z = AC + B
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- Design the following combinational logic circuit with a four-bit input and a three-bit output. The input represents two unsigned 2-bit numbers: A1 A0 and B1 B0. The output C2 C1.C0 is the result of the integer binary division A1 A0/B1 B0 rounded down to three bits. The 3-bit output has a 2-bit unsigned whole part C2 C1 and a fraction part CO. The weight of the fraction bit CO is 21. Note the quotient should be rounded down, i.e. the division 01/11 should give the outputs 00.0 (1/3 rounded down to 0) not 00.1 (1/3 rounded up to 0.5). A result of infinity should be represented as 11.1. A minimal logic implementation is not required. (Hint: start by producing a truth table of your design).In this assignment, you are required to design a circuit that counts and displays the sequence of the number 010430011092 . The number will then be displayed on a 7-segment display and changed every 1 second. The block diagram is as shown in Figure 1. Construct your design as follow: - (a) Design a combinational logic circuit that converts binary number to a sequence of the number 010430011092 and to be displayed on a single common anode 7-segment display. The logic circuit must be designed using 2-input NAND gate4- Draw the output waveform if the signal shown in Figure below is applied to inputs of J-K Flip-Flop. Q is initially LOW. PR HIGH CLK- K CLR CLK- PR CLR
- Design a logic circuit with four inputs and one output that will produce "l" in the output only if the input patterns have odd number of zeros. a) Write the Boolean equation for the circuit in the simplest SOP form. b) Draw the logic circuit for the above equation in its simplest form. c) Re Design the logic circuit using NANI) gates only?2.1 Combinational logic circuits. Tabulates a truth table for the following Boolean expression shown in Equation 1.1. f = A.B.C + A.B.C + A.B.C (1.1) 2.2 Half adder. A half adder is a circuit that adds two binary digits, A and B. It has two outputs, sum (S) and carry (C). The carry signal represents an overflow into the next digit of a multi-digit addition. Figure 1.2 depicted a logic diagram for a half adder. a. derives the Boolean expression for s and c. b. tabulates a truth table for the half adder. Ao Bo Figure 1.2: Half adder os S CDesign a sequential circuit with two flip-flops A and B, and one input x_in. When x_in = 0, the circuit goes through the state transitions from 00 to 10, to 01, to 11, back to 00, and repeats. When x_in = 1, the circuit will reverse the given sequence. a. Using D Flip-Flop. b. Using JK Flip-flop. Provide the state diagram, state table, state equations, and the circuit diagram.
- 1-Using the Karnaugh Method, design and draw the circuit of the logic circuit that gives the result of the multiplication of the two-bit numbers "AB" and "CD" according to minterms (SOP). Do not make any further simplifications before or after the Karnaugh Method. In tables and Karnaugh, ensure that the least significant bit is on the far right and the entries are sorted alphabetically. Make sure that the circuit you have drawn is understandable, the function you have written and the truth table are readable.Design a 6-bit counter with control input using flip-flops. Every hour pulseIt should be a design that will increase or decrease by 4 when it arrives. Control input increment orwill determine the decrease. Increasing when control input is 0, decreasing when 1should be designed.Q) You want to design a synchronous counter sequential (sequential) logic circuit. Counting from 0 to 9 and will not count the last two digit of your student number. (a) List the steps that you will apply in the design approach. State Chart and State Create the table. (b) Design the sequential circuit using JK Flip-Flop. Explain each step. Desired action show that you have done it. " last two digit student num: 0 4 " Not : I want the solution to contain tables and equations, and the electrical circuit resulting from tables and equations, as in the picture that I attached,And if possible, I want the solution on paper if possible.
- Design a 3-bit synchronous counter, which counts in the sequence: 001, 011, 010, 110, 111, 101, 100 (repeat) 001, ... Draw the schematic of the design with three flip-flops and combinational logics.Design the 4-bit Johnson Counter using D flip-flop as shown in the figure in the VHDL code. 4 Bit Johnson Counter using D FlipFlop él 9 CLOCK RESET FDC CUR 3 FDC FDC FDCDesign a sequential circuit with two flip-flops A and B, and one input x_in. When x_in = 0, the state of the circuit remains the same. When x_in = 1, the circuit goes through the state transitions from 00 to 01, to 11, to 10, back to 00, and repeats. a. Using D Flip-Flop. b. Using JK Flip-flop.