QUESTION 3 A full-adder has three inputs A, B, CIN and two outputs sum (S) and carry (Cy). i) Draw the truth table of a full-adder. ii) Using a 3 to 8 active low output decoder, implement the full-adder. a)
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- Draw a symbol for a solid-state logic element AND.Design a circuit with a truth table that converts a number between 0 to 7 in decimal to binary then passes it to another component that outputs the number in the output line of the decimal number. Demonstrate the value of input and output using '2'. Discuss the process in your own words. [Hint: The number passes from encoder to decoder. Consider there is no enable pin in the decoder.]QUESTION 3 a) One of Medium Scale Integrated (MSI) circuit application is to compare between two input binary quantities and generates outputs to indicate which one has the greater, equal, or lower magnitude. Design the circuit to compare between two 2-bit inputs, you may choose only one output. Justify your design. b) Design an encoder to perform number conversion between two different numbering systems.
- 5) Design an Encoder system using the following truth table for a system. a) Find the out-put statement for each out-put, b) simplify the out puts using K-map, c) draw the circuit for each out-put. bits Encoder communication Element Binary Number (0-15) Code 1 3 1 1 5 1 1 1 1 1 1 1 1 1 1 10 1 11 1 12 1 1 13 1 1 1 14 15 1 1 1- What is meant by 4 to 16-line decoder? Draw the block diagram of that decoder (Please don't show the logic circuit) that has active HIGH inputs and active LOw outputs. - Draw the decoding logic circuit that will detect following binary codes. Given that an active HIGH output is required. (i) 1101 (ii) 110010 - You wish to detect only the presence of the codes 1110, 1101, 0111 and 1111. An active HIGH output is required to indicate their presence. Develop the minimum decoding logic with a single output that will indicate when any one of these codes is on the inputs. For any other codes output must be LOW. -For the decimal to BCD encoder logic of the following circuit, assume that the inputs 5, 7 and 9 are HIGH. What is the output code? Is it a valid BCD code? A, 45671. What is the modulo of the circuit below? 2. Make a table of the count sequence. 3. A BCD counter can assume____discrete state. 4. A BCD counter can divide its input frequency by____. 5. A four-bit binary counter contains the number 0100. Nine inpulse occur. The new counter state is_____. 6. Design a 4-bit down counter.
- An encoder a.Group of answer choices b.converts a binary code input to a single output c.Converts a singe input to a binary coded output d.Selects from many data sources e.Directs data to one of many data terminalsBinary to Octal Decoder using 7-Segment Display. write the k-map and use 4 input and 7output?- What is meant by 4 to 16-line decoder? Draw the block diagram of that decoder (Please don't show the logic circuit) that has active low inputs and active high outputs. - Draw the decoding logic circuit that will detect following binary codes. Given that an active low output is required. (i) 1001 (ii) 110110 - You wish to detect only the presence of the codes 1110, 1101, 0101 and 1001. An active HIGH output is required to indicate their presence. Develop the minimum decoding logic with a single output that will indicate when any one of these codes is on the inputs. For any other codes output must be LOW. -For the decimal to BCD encoder logic of the following circuit, assume that the inputs 5, 6 and 9 are HIGH. What is the output code? Is it a valid BCD code? A, 3 A -A, 9. 2. 4507
- With in a quantization, if the total input voltage range is subdivided into two smaller sub-ranges and coded in a mirror image of two halves except first bit, such a coding is called as; a. Folded Binary Code O b. Unfolded Binary Code O c. Combinational code d. Manchester CodeProcedure: 1. Design an even/odd parity generator for 4-bit data. 2. Design a parity checker circuit for a 4-bit data. 3. Design a logic circuit for a 3-bit message to be transmitted with an even parity bit. 4. Four data bits are to be transmitted. Design a parity bit generator to give an o/p of 'l' if the number of logic l's in the message is: (i) odd; (ii) even.Question 1. Which base, hex or octal, is more commonly used today as a shorthand representation for binary numbers and why? To answer, refer to Table 2.1 and consider the following: a. which base, hex or octal, will require fewer digits to represent a binary number? And b. given that a byte is comprised of 8 bits, which base, hex or octal, can be more compactly used to represent an 8-bit (1-byte) binary number? Assume a byte value of 11111111 and convert to octal and hex. Write your answers, including explanations, in your lab journal. Table 2.1: Numbers 0 to 31 and 56 to 71 in decimal (base 10), binary (base 2), octal (base 8), and hexadecimal (base 16). Decimal Binary Octal Hex Decimal Binary Octal Hex 00 0000 00 00 56 11 1000 70 38 01 0001 01 01 57 11 1001 71 39 02 0010 02 02 58 11 1010 72 ЗА 03 0011 03 03 59 11 1011 73 3B 04 0100 04 04 60 11 1100 74 3C 05 0101 05 05 61 11 1101 75 3D 06 0110 06 06 62 11 1110 76 ЗЕ 07 0111 07 07 63 11 1111 77 3F 08 1000 10 08 64 100 0000 100 40 09…