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- 5- Determine an alternative method for implement the full-adder. Hint: Write the expressions of the circuit and simplify using icarnaugh map.Then implement using AND-OR gates. 6- Design a logic cct using NAND gate and convert BCD code to Excess-3code.F(a,b,c,d)=ab'+c'd'+a'cd' Perform the function in accordance with the following styles using the Karnaugh diagram. Draw each simplification using the corresponding logic gates. a) only or not (NOR) b) and not just (NAND) c) OR-NAND d) AND-NORA d. B Figure 1 3. Referring to the logic circuit in Figure 1, determine: a. The simplified Boolean expression. b. The output waveform. C H c. Due to fabrication errors, lines d and f were shorted to the supply voltage. What happens to the output of the circuit? d. Your hardware resources are limited to 2-input NOR gate only. Draw the gate schematic of the simplified Boolean expression in 3(a).
- d) Draw the schematics of 4-bit synchronous and asynchronous MOD-8 counters and comment on their pros and cons. e) Calculate the noise margin for a logic gate with the following logic levels: VIL = 1.1 V, VIH = 3.2 V, VOL = 0.6 V, VOH = 4.0 V.4) Draw a logic diagram of a divide-by-14 counter using IC 7493 and 2-input AND gate.Design an exclusive nor (XNOR) gate using only 74HC02 NOR gates. (Pin outs shown below). Complete your design by first drawing the truth table for the XNOR gate, simplify, and then draw the logic including pin numbers, Vec and ground for the dual inline package. This is to be a build ready design. Be sure to account for unused gates.
- a) Write the truth table and logical expression for a two-input AND gate. b) Draw the IC pin diagram and logical symbol for a two input QUAD AND Gate.5) below is the accuracy table showing the output values for two separate binary number entries (W and Y) with a length of two bits. Get the simplest form of output functions with the Karnaugh diagram. Draw a logic diagram of the circuit that performs the function of these functions.Describe in detail which functions a, b and C perform for 2-bit binary numbers in the input.Draw the logic diagram for OR gate using NOR gates.
- We want to design a circuit to detect prime numbers.The input of the circuit is a 4-bit binary number and the output is a single bit and should show one when the number is prime and zero otherwise.B. Implement the circuit using a 4× 1 multiplexer and combinational logic gates.C. Implement the circuit using only one decoder and one OR gate. What is the size of the decoder you use?3. Type the structural VHDL code that describes the expression F = AB' + A' B. Assume that the VHDL code for the logic gates in Experiments 3.1 through 3.3 are already defined. Use Exps as the name of the entity.Design a combinational circuit with four inputs and one output. The output is 1, when the binary value of the input is less than or equal to 3, the output is zero otherwise. The output is 1 when the binary value of the input is a prime number greater than 9.a) Obtain the truth table.b) Find the simplified output function in sum of products. c) Draw the logic diagram using NOR gates only. ……