The Mux below implements the function F = A F 1 B Select one: O a. F= A + B Ob. F= AB + A'B OC F=B+ A Od. F= AB + A
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- The following table corresponds to a master-slave "positive edge trigger" D Flip Flop. Draw the time signal for Q and Q'. Phi 1 = Phi2. Phi1 passes if it is zero and in phi2 the signal passes when phi 2 is zero D 01 D- Q' Q 381 master 2 Do slave Q5. JK flip-flops are often used to build counters. The JK flip-flop will toggle the original output value when triggered by the clock signal if both the J,K inputs are connected with a constant "high"(logic 1). All the JK flip-flops in Figure 2 are negative edge triggered. All the initial values of Q2Q1Q0 are 0. Qo (LSB) (MSB) Input K K Logic 1 Input Q2 000 Figure 2. Counter (a) Sketch the output waveforms forQ2 Q1 Q0. Write down the output binary value (Q2Q1Q0: such as "000", "001") for each clock period on the figure. (b) Describe the function of the counter (e.g. binary down counter counting from 7 to 0).Question: The flip-flops in the drawing below are positive edge triggered D flip-flops. Let Q2, Q1, QO = 0,0,0 initially. a) Plot the clock, Q2, Q1 and QO until the outputs begin to repeat. b) Show the circuits acts as a counter 00 1000 Hz/50%
- You want to design a synchronous counter sequential (sequential) logic circuit. It will count from 0 to 9 and will not count the decimal digits in the last two digits of your student number. a. List the process steps that you will apply in the design approach. Create the State Chart and State Chart. b. Design the sequential circuit using JK Flip-Flop. Explain each step. Show that it has performed the desired action. last two numbers 02Design a combinational circuit using multiplexer for a car chime based on thefollowing system: A car chime or bell will sound if the output of the logic circuit(X) is set to a logic ‘1’. The chime is to be sounded for either of the followingconditions:• if the headlights are left on when the engine is turned off and• if the engine is off and the key is in the ignition when the door is opened.Use the following input names and nomenclature in the design process:• ‘E’ – Engine. ‘1’ if the engine is ON and ‘0’ if the engine is OFF• ‘L’ – Lights. ‘1’ if the lights are ON and ‘0’ if the lights are OFF• ‘K’ – Key. ‘1’ if the key is in the ignition and ‘0’ if the key is not in the ignition• ‘D’ – Door. ‘1’ the door is open and ‘0’ if the door is closed• ‘X’ – Output to Chime. ‘1’ is chime is ON and ‘0’ if chime is OFFQ) You want to design a synchronous counter sequential (sequential) logic circuit. Counting from 9 to 0 and will not count the last digit of your student number. (a) List the steps that you will apply in the design approach. State Chart and State Create the table. (b) Design the sequential circuit using JK Flip-Flop. Explain each step. Desired action show that you have done it. " last digit student num:4 " Not : I want the solution to contain tables and equations, and the electrical circuit resulting from tables and equations, as in the picture that I attached,And if possible, I want the solution on paper if possible.
- Design a sequence detector that detects the sequence 1010. This detector has one input X, and one output Y. The output Y is set to 1 only when the input sequence for X is a 0 followed by a 0 by followed by another 0 and finally followed by a 1, detecting the sequence, otherwise the output Y is set to 0. Using D-type flip-flops in designing this detector. 1.Show the state diagram 2.Show the state table3. Draw the logic diagram of the designed deviceBuild a truth table and draw the output wave form for the following logic gates shown in Figure Q2. A o B Co Do E o D D Figure Q2 ZReview Questions Question [4] For the given sequential circuit: a. What type of state machine is this circuit and why? b. Determine the flip-flop input equations and the output equations from the circuit. c. Derive the next-state equation for each flip-flop from its input equations. d. Derive the State table. e. Derive the State Graph. Determine the state sequence and output sequence if the initial state is So and the input sequence is X= 01100 B B KA CK JA KB CK to Clock Clock X" X- X' A B'
- (c) For each of the following parts, fill in the respective row of the timing diagram shown in Figure 5. (i) Find the input for a rising-edge-triggered D flip-flop that would produce the output Q as shown in Figure 5. (ii) Find the input for a rising-edge-triggered T flip-flop that would produce the output Q as shown in Figure 5. Clock D Figure 52- Draw the output waveform for D flip flop the inputs shown in the timing diagram below Clock: Dimput:Convert a single J-K flip flop to a T-flip flop. Include all steps involved. What is the next count if the counter started with 000 and 011 (unused states)? i want the anwer for the second qustion