Computer Systems: A Programmer's Perspective (3rd Edition)
3rd Edition
ISBN: 9780134092669
Author: Bryant, Randal E. Bryant, David R. O'Hallaron, David R., Randal E.; O'Hallaron, Bryant/O'hallaron
Publisher: PEARSON
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Expert Solution & Answer
Chapter 3.8, Problem 3.38PP
Explanation of Solution
Load Effective Address:
- The load effective address instruction “leaq” is a variant of “movq” instruction.
- The instruction form reads memory to a register, but memory is not been referenced at all.
- The first operand of instruction is a memory reference; the effective address is been copied to destination.
- The pointers could be generated for later references of memory.
- The common arithmetic operations could be described compactly using this instruction.
- The operand in destination should be a register.
Data movement instructions:
- The different instructions are been grouped as “instruction classes”.
- The instructions in a class performs same operation but with different sizes of operand.
- The “Mov” class denotes data movement instructions that copy data from a source location to a destination.
- The class has 4 instructions that includes:
- movb:
- It copies data from a source location to a destination.
- It denotes an instruction that operates on 1 byte data size.
- movw:
- It copies data from a source location to a destination.
- It denotes an instruction that operates on 2 bytes data size.
- movl:
- It copies data from a source location to a destination.
- It denotes an instruction that operates on 4 bytes data size.
- movq:
- It copies data from a source location to a destination.
- It denotes an instruction that operates on 8 bytes data size.
- movb:
Array indexing:
- The declaration “T D[R][C]” where “T” denotes as a data type, “D” an array and “R” as well as “C” denotes rows and columns respectively.
- The “L” denotes size of data type.
- The array element “D[i][j]” is at address “&D[i][j]=xD+L(C.i+j)”.
Explanation:
- The details of instructions are shown below:
- The registers “%rdi” and “%rsi” contains values for “i” and “j” respectively.
- The instruction “leaq 0(,%rdi, 8), %rdx” performs operation “8i” and stores in register “%rdi”...
Expert Solution & Answer
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Check out a sample textbook solutionStudents have asked these similar questions
(Base Indexed Memory Addressing Mode) Only at [{DS | SS | ES}: {SI | DI} + {BX +
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Described each line and write down the equation of physical add. For the following assembly
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01 org 100
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1. (Assembly Language Programming)
Write a procedure gcd for finding the greatest common divisor (GCD) of two positive
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int gcd (int x, int y)
{
if (y
0)
==
return x;
else
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}
Assume that x and y are passed to procedure gcd via X4 and X5 and the result is
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(Base Indexed Memory Addressing Mode) Only at [{DS | sS | ES} : {SI | DI} + {BX + BP}]
BA
EA
There is a combination between (Base and Index) in Effective Add. (EA)
Ex.
Described each line and write down the equation of physical add. For the following assembly
code:
01 org 100
02 MOV [BX+DI], CL
оз мOV CH, [BX+SI]
04 MOV AH, [BP+DI]
05 MOV [BP+SI], AL
06 ret
Sol:
Chapter 3 Solutions
Computer Systems: A Programmer's Perspective (3rd Edition)
Ch. 3.4 - Prob. 3.1PPCh. 3.4 - Prob. 3.2PPCh. 3.4 - Prob. 3.3PPCh. 3.4 - Prob. 3.4PPCh. 3.4 - Prob. 3.5PPCh. 3.5 - Prob. 3.6PPCh. 3.5 - Prob. 3.7PPCh. 3.5 - Prob. 3.8PPCh. 3.5 - Prob. 3.9PPCh. 3.5 - Prob. 3.10PP
Ch. 3.5 - Prob. 3.11PPCh. 3.5 - Prob. 3.12PPCh. 3.6 - Prob. 3.13PPCh. 3.6 - Prob. 3.14PPCh. 3.6 - Prob. 3.15PPCh. 3.6 - Prob. 3.16PPCh. 3.6 - Practice Problem 3.17 (solution page 331) An...Ch. 3.6 - Practice Problem 3.18 (solution page 332) Starting...Ch. 3.6 - Prob. 3.19PPCh. 3.6 - Prob. 3.20PPCh. 3.6 - Prob. 3.21PPCh. 3.6 - Prob. 3.22PPCh. 3.6 - Prob. 3.23PPCh. 3.6 - Practice Problem 3.24 (solution page 335) For C...Ch. 3.6 - Prob. 3.25PPCh. 3.6 - Prob. 3.26PPCh. 3.6 - Practice Problem 3.27 (solution page 336) Write...Ch. 3.6 - Prob. 3.28PPCh. 3.6 - Prob. 3.29PPCh. 3.6 - Practice Problem 3.30 (solution page 338) In the C...Ch. 3.6 - Prob. 3.31PPCh. 3.7 - Prob. 3.32PPCh. 3.7 - Prob. 3.33PPCh. 3.7 - Prob. 3.34PPCh. 3.7 - Prob. 3.35PPCh. 3.8 - Prob. 3.36PPCh. 3.8 - Prob. 3.37PPCh. 3.8 - Prob. 3.38PPCh. 3.8 - Prob. 3.39PPCh. 3.8 - Prob. 3.40PPCh. 3.9 - Prob. 3.41PPCh. 3.9 - Prob. 3.42PPCh. 3.9 - Practice Problem 3.43 (solution page 344) Suppose...Ch. 3.9 - Prob. 3.44PPCh. 3.9 - Prob. 3.45PPCh. 3.10 - Prob. 3.46PPCh. 3.10 - Prob. 3.47PPCh. 3.10 - Prob. 3.48PPCh. 3.10 - Prob. 3.49PPCh. 3.11 - Practice Problem 3.50 (solution page 347) For the...Ch. 3.11 - Prob. 3.51PPCh. 3.11 - Prob. 3.52PPCh. 3.11 - Practice Problem 3.52 (solution page 348) For the...Ch. 3.11 - Practice Problem 3.54 (solution page 349) Function...Ch. 3.11 - Prob. 3.55PPCh. 3.11 - Prob. 3.56PPCh. 3.11 - Practice Problem 3.57 (solution page 350) Function...Ch. 3 - For a function with prototype long decoda2(long x,...Ch. 3 - The following code computes the 128-bit product of...Ch. 3 - Prob. 3.60HWCh. 3 - In Section 3.6.6, we examined the following code...Ch. 3 - The code that follows shows an example of...Ch. 3 - This problem will give you a chance to reverb...Ch. 3 - Consider the following source code, where R, S,...Ch. 3 - The following code transposes the elements of an M...Ch. 3 - Prob. 3.66HWCh. 3 - For this exercise, we will examine the code...Ch. 3 - Prob. 3.68HWCh. 3 - Prob. 3.69HWCh. 3 - Consider the following union declaration: This...Ch. 3 - Prob. 3.71HWCh. 3 - Prob. 3.72HWCh. 3 - Prob. 3.73HWCh. 3 - Prob. 3.74HWCh. 3 - Prob. 3.75HW
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